The FMC232 is a FPGA Mezzanine Card (FMC) per VITA 57.1 standard, offering small footprint and low power dual fully featured wideband Rx/Tx channels.
The FMC232 combines RF front end, frequency synthesizers for Rx and for Tx, mixed-signal baseband section and flexible digital interface to host processor through the LPC connector. The FMC232 operates within the 70 MHz to 6.0 GHz frequency range, covering most licensed and unlicensed bands, and provides an instantaneous bandwidth programmable from 200 KHz to 56 MHz.
Utilizing an AD9361 RF transceiver, the chip offers high performance noise figure and linearity. Each Receiver (RX) subsystem includes independent Automatic Gain Control (AGC), quadrature correction, dc offset correction, and digital filtering.

Key Features

Dual complete transceiver signal chain solution usinAnalog Devices AD9361 transceiver

Frequency range 70 MHz to 6 GHz with instantaneous bandwidth from 200 kHz to 56 MHz

MIMO transceiver is Time Domain Duplex (TDD) and Frequency Domain Duplex (FDD) compatible

Supported by DAQ Series™ data acquisition software

FPGA Mezzanine Card (FMC) per VITA 57

Multiplexed 2x RF inputs on each RF channel

On-board clocking or external clock with multi-card synchronization capability

Low Pin Count (LPC) 160-pin connector