The VPX529 provides two Analog Devices AD9129. Each chip core is based on a quad switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.7 GSPS when configured for Mix-Mode™ or 2x interpolation.
The high dynamic range and bandwidth enable multi-carrier generation up to 4.2 GHz. The on-board Virtex-7 690T provides signal processing capability for complex waveform generation, appropriate for applications such as SDR, ATE and jamming.
Additional ports are optionally routed to the FPGA from P2, providing the user with flexibility to support custom high-bandwidth interconnects between compatible FPGA modules (depending on backplane capabilities).
The FPGA is supported by FLASH memory for boot image storage, three banks of QDR-II+ for fast data buffering and a further bank of DDR3 for local data.
The module includes a very flexible clocking sub-system, supporting internal or external (backplane or FMC connector) clock source with internal PLL/jitter cleaner.
The unit is available in a range of temperature and shock/vib specifications per ANSI/VITA 47, up to V3 and OS2.
3U Dual DAC (AD9129) 14-bit @ 5.7 GSPS (2.85 GSPS direct RF synthesis)
Xilinx Virtex-7 690T FPGA in FFG-1761 package
Internal or external clock with an on-board wideband PLL and clock jitter cleaner
Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
Triple bank QDR2+ (432 Mb total) and 1 GB DDR3
Optional connections on P2
Health Management through dedicated Processor