The AMC540 is based on Xilinx Virtex-7 XC7VX690T FPGA. The FPGA interfaces directly to the AMC connector, allowing the core to interface to the host with multiple protocols such as 10GbE, PCIe or SRIO. The FPGA has three external banks of 64-bit DDR3 memory.

The AMC540 has dual multicore Digital Signal Processors (DSP) optional TMS320C6670 or TMS320C6678. The DSPs are routed to the FPGA via PCIe x2, and SRIO x4. The DSP’s are also connected via dual GbE to the on board managed switch, allowing for flexible signal processing applications.

The module routes GbE on ports 0 and 1 per AMC.2, PCIe Gen3/SRIO/10GbE dual x4 or single x8 on ports 4-11 per AMC.1/ AMC.2/ AMC.4 specifications. Ports 12-15 and 17-20 are also routed to the FPGA.

AMC540 has on board managed Layer two switch which interconnect the GbE via the front,DSP, FPGA and rear (ports 0/1). The on-board, re-configurable FPGA interfaces to the AMC FCLKA and TCLKA-D via a clock and jitter cleaner. The module also has Ref CLK IN/OUT and Trig IN to the front.

Key Features

• Xilinx Virtex-7 XC7VX690T FPGA

• DDR-3 Memory (3 banks of 64-bit, 6 GB Total)

• Dual DSP (optionally TMS320C6670 or TMS320C6678)

• 8 GB of DDR-3 per CPU with ECC

• 24 TX/RX Fibre via MTP/MPO Connector

• PCIe (AMC.1) and SRIO (AMC.4) on ports 4-7 and 8-11 per FPGA load

• GbE on ports 0,1 (AMC.2)

• Ports 12-15 and 17-20 routed to FPGA

• Layer two managed switch