The FMC212 is an FPGA Mezzanine Card per VITA 57 specification with a high speed Dual ADC and dual DAC.

The ADC is based on e2v part number EV12AS200AZP which provides two Analog inputs with 12-bit resolution at 1.5 GSPS. The DAC is based on TI part number DAC39J82 which provides two Analog outputs with 16-bit resolution at 2.8 GSPS.

The Module has a wide-band PLL for RF sampling clock. The wide-band PLL has its RF reference clocking which can come from front panel, FMC Carrier or on board.

Key Features

Ø FPGA Mezzanine Card (FMC) per VITA-57

ØSingle module

ØDual ADC with EV12AS200AZP

Ø12-bit 1.5GSPS

ØFull power input Bandwidth at 1.5GSPS is 2.3GHz

ØVery low latency < 5Clock Cycles

ØDual DAC with TI DAC39J82  

Ø16-bit 2.8GSPS

ØJESD204B 8 lanes

ØOn board wide-band PLL

ØRF clock input reference

ØTrig In/Out

ØRoHS compliant