The FMC211 is an FPGA Mezzanine Card per VITA 57 specification with a high speed ADC.

The ADC converter utilizes the e2v part number EV10AS150B device which has a high linearity ADC. The module has an ultra-low jitter wideband PLL Synthesizer for sampling.

The Modules allows the RF input signal to be differential or single ended. With singled ended signal there is a Balun with the Freq range from 500KHz to 6GHz. The module could also be ordered with differential input which will not have the Balun installed.

The front panel RF clock is a reference input clock to the PLL or it could input to the ADC direct sampling clock. The PLL can also receive its reference clock from an on board or the FMC Carrier.

The Module has 4 GPIO as differential input/output. The Differential input/output can be configured as single ended.

Key Features

ØFPGA Mezzanine Card (FMC) per VITA-57

ØADC EV10AS150B  @ 2.6 GSPS

Ø5 GHz Full Power Input Bandwidth (–3dB)

ØTrue single core architecture (no calibration required)

ØFull scale Analog input Voltage Span 500 mVpp

ØUltra Low Jitter wideband PLL Synthesizer

ØOption for Direct RF clock sampling or  reference clock input

ØThe ADC RF input can be differential or single ended